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Studio render of a top-down orthographic render of a system board with processor socket, memory slots and PCIe slots, traces highlighted in fine copper

Topic · 2 min read

System buses and shared resources

Controllers, processors, and memory cooperate through standardized connections and resource-management rules. These foundations explain why a seemingly simple operation may involve several layers below an application.

The bigger picture

A platform has to coordinate both communication and ownership. A controller needs a way to move bytes, notify the processor when work finishes, and describe the memory regions or channels assigned to it. The operating system mediates these responsibilities so unrelated components can share the machine without every application handling the underlying electrical details.

The terms in this section describe mechanisms, not upgrade recommendations. Faster nominal link speeds do not guarantee faster applications, and an interrupt count is not a direct measurement of hardware quality. Context matters: workload, power state, software scheduling, and the design of the complete path all influence what a user sees. The individual topics separate each mechanism from the assumptions often attached to it.

Reading map: System buses and shared resourcesFirst 1 topics in reading order: The bigger picture. Each topic links to its section or page.INSIDE THIS PAGESystem buses and shared resources1The bigger picture2 paragraphs

Computer & System

Note these before you change anything

Useful facts to have to hand while reading about system buses and shared resources.

  • Motherboard or computer model and firmware version
  • Chipset driver package version
  • Any firmware settings changed from defaults
  • Unknown devices listed in Device Manager

Computer & System: One selected path: a device on a chipset bus

  1. Operating systemmanages devices
  2. Chipset driversidentify buses and power features
  3. ChipsetPCIe, USB and SATA links
  4. Firmware (UEFI)initialises hardware at start-up
  5. Attached deviceson those links
Conceptual schematic of a selected path, not every request. Shown in one direction; the reverse direction uses related layers. Real systems add services, filter drivers and firmware not shown. Highlighted: the layer a driver change affects.

Pages in System buses and shared resources

Thumbnail for PCI Express connections: a generic expansion card aligned above a long PCIe, set beside a top-down orthographic render of a system (System buses and shared resources)Reference · 2 min read

PCI Express connections

PCI Express is a high-speed interconnect used by many internal components. It carries structured transactions over serial links, giving graphics, storage…

Thumbnail for Interrupts and completed work: a processor package on a board with a single, set beside a top-down orthographic render of a system (System buses and shared resources)Reference · 2 min read

Interrupts and completed work

An interrupt is a notification that asks a processor to pay attention to an event. Hardware can use notifications to report completed transfers or other…

Thumbnail for Direct memory access explained: a storage controller chip connected straight to a row, set beside a top-down orthographic render of a system (System buses and shared resources)Reference · 2 min read

Direct memory access explained

Direct memory access allows a controller to transfer data to or from memory without the processor copying every byte itself. The processor still coordinates…

Thumbnail for Firmware tables and ACPI: a small firmware flash chip on a motherboard with, set beside a top-down orthographic render of a system (System buses and shared resources)Reference · 2 min read

Firmware tables and ACPI

Firmware supplies platform information that the operating system cannot discover from a connector alone. ACPI is one standardized way to describe…

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